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    • Abhinav Kumar's avatar
      drm/bridge: adv7533: remove dynamic lane switching from adv7533 bridge · 9a0cdcd6
      Abhinav Kumar authored
      adv7533 bridge tries to dynamically switch lanes based on the
      mode by detaching and attaching the mipi dsi device.
      
      This approach is incorrect because this method of dynamic switch of
      detaching and attaching the mipi dsi device also results in removing
      and adding the component which is not necessary.
      
      This approach is also prone to deadlocks. So for example, on the
      db410c whenever this path is executed with lockdep enabled,
      this results in a deadlock due to below ordering of locks.
      
      -> #1 (crtc_ww_class_acquire){+.+.}-{0:0}:
              lock_acquire+0x6c/0x90
              drm_modeset_acquire_init+0xf4/0x150
              drmm_mode_config_init+0x220/0x770
              msm_drm_bind+0x13c/0x654
              try_to_bring_up_aggregate_device+0x164/0x1d0
              __component_add+0xa8/0x174
              component_add+0x18/0x2c
              dsi_dev_attach+0x24/0x30
              dsi_host_attach+0x98/0x14c
              devm_mipi_dsi_attach+0x38/0xb0
              adv7533_attach_dsi+0x8c/0x110
              adv7511_probe+0x5a0/0x930
              i2c_device_probe+0x30c/0x350
              really_probe.part.0+0x9c/0x2b0
              __driver_probe_device+0x98/0x144
              driver_probe_device+0xac/0x14c
              __device_attach_driver+0xbc/0x124
              bus_for_each_drv+0x78/0xd0
              __device_attach+0xa8/0x1c0
              device_initial_probe+0x18/0x24
              bus_probe_device+0xa0/0xac
              deferred_probe_work_func+0x90/0xd0
              process_one_work+0x28c/0x6b0
              worker_thread+0x240/0x444
              kthread+0x110/0x114
              ret_from_fork+0x10/0x20
      
      -> #0 (component_mutex){+.+.}-{3:3}:
              __lock_acquire+0x1280/0x20ac
              lock_acquire.part.0+0xe0/0x230
              lock_acquire+0x6c/0x90
              __mutex_lock+0x84/0x400
              mutex_lock_nested+0x3c/0x70
              component_del+0x34/0x170
              dsi_dev_detach+0x24/0x30
              dsi_host_detach+0x20/0x64
              mipi_dsi_detach+0x2c/0x40
              adv7533_mode_set+0x64/0x90
              adv7511_bridge_mode_set+0x210/0x214
              drm_bridge_chain_mode_set+0x5c/0x84
              crtc_set_mode+0x18c/0x1dc
              drm_atomic_helper_commit_modeset_disables+0x40/0x50
              msm_atomic_commit_tail+0x1d0/0x6e0
              commit_tail+0xa4/0x180
              drm_atomic_helper_commit+0x178/0x3b0
              drm_atomic_commit+0xa4/0xe0
              drm_client_modeset_commit_atomic+0x228/0x284
              drm_client_modeset_commit_locked+0x64/0x1d0
              drm_client_modeset_commit+0x34/0x60
              drm_fb_helper_lastclose+0x74/0xcc
              drm_lastclose+0x3c/0x80
              drm_release+0xfc/0x114
              __fput+0x70/0x224
              ____fput+0x14/0x20
              task_work_run+0x88/0x1a0
              do_exit+0x350/0xa50
              do_group_exit+0x38/0xa4
              __wake_up_parent+0x0/0x34
              invoke_syscall+0x48/0x114
              el0_svc_common.constprop.0+0x60/0x11c
              do_el0_svc+0x30/0xc0
              el0_svc+0x58/0x100
              el0t_64_sync_handler+0x1b0/0x1bc
              el0t_64_sync+0x18c/0x190
      
      Due to above reasons, remove the dynamic lane switching
      code from adv7533 bridge chip and filter out the modes
      which would need different number of lanes as compared
      to the initialization time using the mode_valid callback.
      
      This can be potentially re-introduced by using the pre_enable()
      callback but this needs to be evaluated first whether such an
      approach will work so this will be done with a separate change.
      
      changes since RFC:
      	- Fix commit text and add TODO comment
      
      changes in v2:
      	- Fix checkpatch formatting errors
      
      Fixes: 62b2f026 ("drm/bridge: adv7533: Change number of DSI lanes dynamically")
      Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/16
      
      
      Suggested-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
      Reviewed-by: default avatarRobert Foss <robert.foss@linaro.org>
      Link: https://lore.kernel.org/r/1661797363-7564-1-git-send-email-quic_abhinavk@quicinc.com
      
      
      Signed-off-by: default avatarRobert Foss <robert.foss@linaro.org>
      Link: https://patchwork.freedesktop.org/patch/msgid/1665522649-3423-1-git-send-email-quic_abhinavk@quicinc.com
      9a0cdcd6
  9. Aug 16, 2022
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  14. May 02, 2022
    • Alvin Šipraga's avatar
      drm: bridge: adv7511: use non-legacy mode for CEC RX · ab0af093
      Alvin Šipraga authored
      The ADV7511 family of bridges supports two modes for CEC RX: legacy and
      non-legacy mode. The only difference is whether the chip uses a single
      CEC RX buffer, or uses all three available RX buffers. Currently the
      adv7511 driver uses legacy mode.
      
      While debugging a stall in CEC RX on an ADV7535, we reached out to
      Analog Devices, who suggested to use non-legacy mode instead.  According
      to the programming guide for the ADV7511 [1], and the register control
      manual of the ADV7535 [2], this is the default behaviour on reset. As
      previously stated, the adv7511 driver currently overrides this to legacy
      mode.
      
      This patch updates the adv7511 driver to instead use non-legacy mode
      with all three CEC RX buffers. As a result of this change, we no longer
      experience any stalling of CEC RX with the ADV7535. It is not known why
      non-legacy mode solves this particular issue, but besides this, no
      functional change is to be expected by this patch. Please note that this
      has only been tested on an ADV7535.
      
      What follows is a brief description of the non-legacy mode interrupt
      handling behaviour. The programming guide in [1] gives a more detailed
      explanation.
      
      With three RX buffers, the interrupt handler checks the CEC_RX_STATUS
      register (renamed from CEC_RX_ENABLE in this patch), which contains
      2-bit psuedo-timestamps for each of the RX buffers. The RX timestamps
      for each buffer represent the time of arrival for the CEC frame held in
      a given buffer, with lower timestamp values indicating chronologically
      older frames. A special value of 0 indicates that the given RX buffer
      is inactive and should be skipped. The interrupt handler parses these
      timestamps and then reads the active RX buffers in the prescribed order
      using the same logic as before. Changes have been made to ensure that
      the correct RX buffer is cleared after processing. This clearing
      procesure also sets the timestamp of the given RX buffer to 0 to mark it
      as inactive.
      
      [1] https://www.analog.com/media/en/technical-documentation/user-guides/ADV7511_Programming_Guide.pdf
      
      
          cf. CEC Map, register 0x4A, bit 3, default value 1:
          0 = Use only buffer 0 to store CEC frames (Legacy mode)
          1 = Use all 3 buffers to stores the CEC frames (Non-legacy mode)
      
      [2] The ADV7535 register control manual is under NDA, but trust me when
          I say that non-legacy CEC RX mode is the default here too. Here the
          register is offset by 0x70 and has an address of 0xBA in the DSI_CEC
          regiser map.
      
      Signed-off-by: default avatarAlvin Šipraga <alsi@bang-olufsen.dk>
      Reviewed-by: default avatarRobert Foss <robert.foss@linaro.org>
      Signed-off-by: default avatarRobert Foss <robert.foss@linaro.org>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220423120854.1503163-3-alvin@pqrs.dk
      ab0af093
    • Alvin Šipraga's avatar
      drm: bridge: adv7511: enable CEC support for ADV7535 · 0aae7623
      Alvin Šipraga authored
      
      Like the ADV7533, the ADV7535 has an offset for the CEC register map,
      and it is the same value (ADV7533_REG_CEC_OFFSET = 0x70).
      
      Rather than testing for numerous chip types in the offset calculations
      throughout the driver, just compute it during driver probe and put it in
      the private adv7511 data structure.
      
      Signed-off-by: default avatarAlvin Šipraga <alsi@bang-olufsen.dk>
      Reviewed-by: default avatarRobert Foss <robert.foss@linaro.org>
      Signed-off-by: default avatarRobert Foss <robert.foss@linaro.org>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220423120854.1503163-2-alvin@pqrs.dk
      0aae7623
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