- Apr 05, 2023
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Ville Syrjälä authored
Include the device and connector information in the SCDC debugs. Makes it easier to figure out who did what. v2: Rely on connector->ddc (Maxime) Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Neil Armstrong <neil.armstrong@linaro.org> Cc: Robert Foss <rfoss@kernel.org> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Jernej Skrabec <jernej.skrabec@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Emma Anholt <emma@anholt.net> Cc: Maxime Ripard <mripard@kernel.org> Cc: intel-gfx@lists.freedesktop.org Cc: linux-tegra@vger.kernel.org Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230403223652.18848-1-ville.syrjala@linux.intel.com Reviewed-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by:
Maxime Ripard <maxime@cerno.tech> Reviewed-by:
Andrzej Hajda <andrzej.hajda@intel.com> Acked-by:
Thierry Reding <treding@nvidia.com>
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Simona Vetter authored
Apparently drivers need to check all this stuff themselves, which for most things makes sense I guess. And for everything else we luck out, because modern distros stopped supporting any other fbdev drivers than drm ones and I really don't want to argue anymore about who needs to check stuff. Therefore fixing all this just for drm fbdev emulation is good enough. Note that var->active is not set or validated. This is just control flow for fbmem.c and needs to be validated in there as needed. Reviewed-by:
Javier Martinez Canillas <javierm@redhat.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230404194038.472803-3-daniel.vetter@ffwll.ch
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Simona Vetter authored
The fb_check_var hook is supposed to validate all this stuff. Any errors from fb_set_par are considered driver/hw issues and resulting in dmesg warnings. Luckily we do fix up the pixclock already, so this is all fine. Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Reviewed-by:
Javier Martinez Canillas <javierm@redhat.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230404194038.472803-2-daniel.vetter@ffwll.ch
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Simona Vetter authored
Drivers are supposed to fix this up if needed if they don't outright reject it. Uncovered by 6c11df58 ("fbmem: Check virtual screen sizes in fb_set_var()"). Reported-by:
<syzbot+20dcf81733d43ddff661@syzkaller.appspotmail.com> Link: https://syzkaller.appspot.com/bug?id=c5faf983bfa4a607de530cd3bb008888bf06cefc Cc: stable@vger.kernel.org # v5.4+ Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Javier Martinez Canillas <javierm@redhat.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Javier Martinez Canillas <javierm@redhat.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230404194038.472803-1-daniel.vetter@ffwll.ch
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Alexander Stein authored
There is no need to require non-sleeping GPIO access. Silence the WARN_ON() if GPIO is using e.g. I2C expanders. Signed-off-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230405135127.769665-1-alexander.stein@ew.tq-group.com
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AngeloGioacchino Del Regno authored
Add a panel entry with delay_200_500_e50 for the AUO NE135FBM-N41 version 8.1, found on a number of ACER laptops, including the Swift 3 (SF313-52, SF313-53), Chromebook Spin 513 (CP513-2H) and others. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230405100452.44225-1-angelogioacchino.delregno@collabora.com
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Pin-yen Lin authored
The default hpd_wait_us in panel_edp.c is 2 seconds. This makes the sleep time in the polling of _ps8640_wait_hpd_asserted become 200ms. Change it to a constant 20ms to speed up the function. Signed-off-by:
Pin-yen Lin <treapking@chromium.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Robert Foss <rfoss@kernel.org> Signed-off-by:
Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230331030204.1179524-1-treapking@chromium.org
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Marek Vasut authored
Do not generate the HS front and back porch gaps, the HSA gap and EOT packet, as per "SN65DSI83 datasheet SLLSEC1I - SEPTEMBER 2012 - REVISED OCTOBER 2020", page 22, these packets are not required. This makes the TI SN65DSI83 bridge work with Samsung DSIM on i.MX8MN. Signed-off-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230403190242.224490-1-marex@denx.de
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Luca Ceresoli authored
The LDB driver currently checks whether dual mode is used, otherwise it assumes only channel 0 is in use. Add support for using only channel 1. In device tree terms, this means linking port 2 only. Doing this cleanly requires changing the logic of the probe functions from this: 1. use of_graph_get_remote_node() on port 1 to find the panel 2. use drm_of_lvds_get_dual_link_pixel_order() to detect dual mode to this: 1. use of_graph_get_remote_node() twice to find remote ports 2. reuse the result of the above to know whether each channel is enabled and to find the panel 3. if (both channels as enabled) use drm_of_lvds_get_dual_link_pixel_order() to detect dual mode Also add a dev_dbg() to log the detected mode and log an error in case no panel was found (no channel enabled). Signed-off-by:
Luca Ceresoli <luca.ceresoli@bootlin.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230405081058.2347130-2-luca.ceresoli@bootlin.com
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Luca Ceresoli authored
dev_warn() and similar require a training \n. Signed-off-by:
Luca Ceresoli <luca.ceresoli@bootlin.com> Reviewed-by:
Robert Foss <rfoss@kernel.org> Signed-off-by:
Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230405081058.2347130-1-luca.ceresoli@bootlin.com
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Alexander Stein authored
There might be cases where the host attach is deferred, use dev_err_probe to add more detailed information to /sys/kernel/debug/devices_deferred. Signed-off-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230405075223.579461-1-alexander.stein@ew.tq-group.com
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Qiang Yu authored
This reverts commit bccafec9. This is due to the depend commit has been reverted on upstream: commit baad1097 ("Revert "drm/scheduler: track GPU active time per entity"") Acked-by:
Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230404002601.24136-4-yq882255@163.com
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Qiang Yu authored
This reverts commit 87767de8. This is due to the depend commit has been reverted on upstream: commit baad1097 ("Revert "drm/scheduler: track GPU active time per entity"") Acked-by:
Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230404002601.24136-3-yq882255@163.com
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Qiang Yu authored
This reverts commit 4a66f3da. This is due to the depend commit has been reverted on upstream: commit baad1097 ("Revert "drm/scheduler: track GPU active time per entity"") Acked-by:
Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230404002601.24136-2-yq882255@163.com
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- Apr 04, 2023
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Rob Clark authored
This should fix a crash that was reported on ast (and possibly other drivers which do not initialize vblank). fbcon: Taking over console Unable to handle kernel NULL pointer dereference at virtual address 0000000000000074 Mem abort info: ESR = 0x0000000096000004 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 FSC = 0x04: level 0 translation fault Data abort info: ISV = 0, ISS = 0x00000004 CM = 0, WnR = 0 user pgtable: 4k pages, 48-bit VAs, pgdp=0000080009d16000 [0000000000000074] pgd=0000000000000000, p4d=0000000000000000 Internal error: Oops: 0000000096000004 [#1] SMP Modules linked in: ip6table_nat tun nft_fib_inet nft_fib_ipv4 nft_fib_ipv6 nft_fib nft_reject_inet nf_reject_ipv4 nf_reject_ipv6 nft_reject nft_ct nft_chain_nat nf_nat nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 rfkill ip_set nf_tables nfnetlink qrtr sunrpc binfmt_misc vfat fat xfs snd_usb_audio snd_hwdep snd_usbmidi_lib snd_seq snd_pcm snd_rawmidi snd_timer snd_seq_device snd soundcore joydev mc ipmi_ssif ipmi_devintf ipmi_msghandler arm_spe_pmu arm_cmn arm_dsu_pmu arm_dmc620_pmu cppc_cpufreq loop zram crct10dif_ce polyval_ce nvme polyval_generic ghash_ce sbsa_gwdt igb nvme_core ast nvme_common i2c_algo_bit xgene_hwmon gpio_dwapb scsi_dh_rdac scsi_dh_emc scsi_dh_alua ip6_tables ip_tables dm_multipath fuse CPU: 12 PID: 469 Comm: kworker/12:1 Not tainted 6.3.0-rc2-00008-gd39e48ca80c0 #1 Hardware name: ADLINK AVA Developer Platform/AVA Developer Platform, BIOS TianoCore 2.04.100.07 (SYS: 2.06.20220308) 09/08/2022 Workqueue: events fbcon_register_existing_fbs pstate: 20400009 (nzCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : drm_crtc_next_vblank_start+0x2c/0x98 lr : drm_atomic_helper_wait_for_fences+0x90/0x240 sp : ffff80000d583960 x29: ffff80000d583960 x28: ffff07ff8fc187b0 x27: 0000000000000000 x26: ffff07ff99c08c00 x25: 0000000000000038 x24: ffff07ff99c0c000 x23: 0000000000000001 x22: 0000000000000038 x21: 0000000000000000 x20: ffff07ff9640a280 x19: 0000000000000000 x18: ffffffffffffffff x17: 0000000000000000 x16: ffffb24d2eece1c0 x15: 0000003038303178 x14: 3032393100000048 x13: 0000000000000000 x12: 0000000000000000 x11: 0000000000000000 x10: 0000000000000000 x9 : ffffb24d2eeeaca0 x8 : ffff80000d583628 x7 : 0000080077783000 x6 : 0000000000000000 x5 : ffff80000d584000 x4 : ffff07ff99c0c000 x3 : 0000000000000130 x2 : 0000000000000000 x1 : ffff80000d5839c0 x0 : ffff07ff99c0cc08 Call trace: drm_crtc_next_vblank_start+0x2c/0x98 drm_atomic_helper_wait_for_fences+0x90/0x240 drm_atomic_helper_commit+0xb0/0x188 drm_atomic_commit+0xb0/0xf0 drm_client_modeset_commit_atomic+0x218/0x280 drm_client_modeset_commit_locked+0x64/0x1a0 drm_client_modeset_commit+0x38/0x68 __drm_fb_helper_restore_fbdev_mode_unlocked+0xb0/0xf8 drm_fb_helper_set_par+0x44/0x88 fbcon_init+0x1e0/0x4a8 visual_init+0xbc/0x118 do_bind_con_driver.isra.0+0x194/0x3a0 do_take_over_console+0x50/0x70 do_fbcon_takeover+0x74/0xf8 do_fb_registered+0x13c/0x158 fbcon_register_existing_fbs+0x78/0xc0 process_one_work+0x1ec/0x478 worker_thread+0x74/0x418 kthread+0xec/0x100 ret_from_fork+0x10/0x20 Code: f9400004 b9409013 f940a082 9ba30a73 (b9407662) ---[ end trace 0000000000000000 ]--- v2: Use drm_dev_has_vblank() Reported-by:
Nathan Chancellor <nathan@kernel.org> Fixes: d39e48ca ("drm/atomic-helper: Set fence deadline for vblank") Signed-off-by:
Rob Clark <robdclark@chromium.org> Reviewed-by:
Thomas Zimmermann <tzimmermann@suse.de> Tested-by:
Nathan Chancellor <nathan@kernel.org> Tested-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20230403160314.1210533-1-robdclark@gmail.com
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Simona Vetter authored
It's just open coded and matches. Note that Thomas said that his version apparently failed for some reason, but hey maybe we should try again. Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Dave Airlie <airlied@redhat.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Javier Martinez Canillas <javierm@redhat.com> Cc: Helge Deller <deller@gmx.de> Cc: linux-fbdev@vger.kernel.org Tested-by:
Thomas Zimmmermann <tzimmermann@suse.de> Reviewed-by:
Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230111154112.90575-1-daniel.vetter@ffwll.ch
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- Apr 03, 2023
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Marek Vasut authored
The TC358767/TC358867/TC9595 are capable of DSI burst mode, which is more energy efficient than the non-burst modes. Make use of it. The TC358767/TC358867/TC9595 are capable of DSI non-continuous clock, since it sources the internal PLL clock from external clock source. The DSI non-continuous clock further reduces power utilization. The TC358767/TC358867/TC9595 may use DSI LPM for command transmissions, make sure this is configured correctly in the DSI mode flags. Signed-off-by:
Marek Vasut <marex@denx.de> Acked-by:
Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20221016003632.406468-1-marex@denx.de
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Simon Ser authored
drm_gem_map_dma_buf() requires drm_gem_object_funcs.get_sg_table to be implemented, or else WARNs. Allow drivers to leave this hook unimplemented to implement purely local DMA-BUFs (ie, DMA-BUFs which cannot be imported anywhere else but the device which allocated them). In that case, reject imports to other devices in drm_gem_map_attach(). v2: new patch v3: use ENOSYS Signed-off-by:
Simon Ser <contact@emersion.fr> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Tian Tao <tiantao6@hisilicon.com> Cc: Maxime Ripard <maxime@cerno.tech> Cc: Hans de Goede <hdegoede@redhat.com> Acked-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230302143502.500661-1-contact@emersion.fr
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Francesco Dolcini authored
LT8912 DSI port supports only Non-Burst mode video operation with Sync Events and continuous clock on clock lane, correct dsi mode flags according to that removing MIPI_DSI_MODE_VIDEO_BURST flag. Cc: <stable@vger.kernel.org> Fixes: 30e2ae94 ("drm/bridge: Introduce LT8912B DSI to HDMI bridge") Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by:
Robert Foss <rfoss@kernel.org> Signed-off-by:
Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230330093131.424828-1-francesco@dolcini.it
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- Apr 02, 2023
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Erico Nunes authored
This exposes an accumulated active time per client via the fdinfo infrastructure per execution engine, following Documentation/gpu/drm-usage-stats.rst. In lima, the exposed execution engines are gp and pp. Signed-off-by:
Erico Nunes <nunes.erico@gmail.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230312233052.21095-4-nunes.erico@gmail.com
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Erico Nunes authored
To track if fds are pointing to the same execution context and export the expected information to fdinfo, similar to what is done in other drivers. Signed-off-by:
Erico Nunes <nunes.erico@gmail.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230312233052.21095-3-nunes.erico@gmail.com
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Erico Nunes authored
lima maintains a context manager per drm_file, similar to amdgpu. In order to account for the complete usage per drm_file, all of the associated contexts need to be considered. Previously released contexts also need to be accounted for but their drm_sched_entity info is gone once they get released, so account for it in the ctx_mgr. Signed-off-by:
Erico Nunes <nunes.erico@gmail.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230312233052.21095-2-nunes.erico@gmail.com
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Harshit Mogalapalli authored
Smatch reports: drivers/gpu/drm/lima/lima_drv.c:396 lima_pdev_probe() warn: missing unwind goto? Store return value in err and goto 'err_out0' which has lima_sched_slab_fini() before returning. Fixes: a1d2a633 ("drm/lima: driver for ARM Mali4xx GPUs") Signed-off-by:
Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Signed-off-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230314052711.4061652-1-harshit.m.mogalapalli@oracle.com
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- Mar 31, 2023
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AngeloGioacchino Del Regno authored
Some SoCs implementing ARM Mali GPUs are subject to speed binning: this means that some versions of the same SoC model may need to be limited to a slower frequency compared to the other: this is being addressed by reading nvmem (usually, an eFuse array) containing a number that identifies the speed binning of the chip, which is usually related to silicon quality. To address such situation, add basic support for reading the speed-bin through nvmem, as to make it possible to specify the supported hardware in the OPP table for GPUs. This commit also keeps compatibility with any platform that does not specify (and does not even support) speed-binning. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230323090822.61766-3-angelogioacchino.delregno@collabora.com
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- Mar 30, 2023
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Rob Herring authored
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. Convert reading boolean properties to of_property_read_bool(). Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20230310144706.1542295-1-robh@kernel.org Signed-off-by:
Rob Herring <robh@kernel.org>
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- Mar 28, 2023
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Rob Clark authored
For an atomic commit updating a single CRTC (ie. a pageflip) calculate the next vblank time, and inform the fence(s) of that deadline. v2: Comment typo fix (danvet) v3: If there are multiple CRTCs, consider the time of the soonest vblank Signed-off-by:
Rob Clark <robdclark@chromium.org> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Rob Clark authored
Will be used in the next commit to set a deadline on fences that an atomic update is waiting on. v2: Calculate time at *start* of vblank period, not end v3: Fix kbuild complaints Signed-off-by:
Rob Clark <robdclark@chromium.org> Reviewed-by:
Mario Kleiner <mario.kleiner.de@gmail.com>
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Rob Clark authored
As the finished fence is the one that is exposed to userspace, and therefore the one that other operations, like atomic update, would block on, we need to propagate the deadline from from the finished fence to the actual hw fence. v2: Split into drm_sched_fence_set_parent() (ckoenig) v3: Ensure a thread calling drm_sched_fence_set_deadline_finished() sees fence->parent set before drm_sched_fence_set_parent() does this test_bit(DMA_FENCE_FLAG_HAS_DEADLINE_BIT). Signed-off-by:
Rob Clark <robdclark@chromium.org> Acked-by:
Luben Tuikov <luben.tuikov@amd.com>
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Rob Herring authored
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Reviewed-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Liu Ying <victor.liu@nxp.com> # i.MX bridge Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20230310144705.1542207-1-robh@kernel.org Signed-off-by:
Rob Herring <robh@kernel.org>
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Marek Vasut authored
Add extras to support i.MX8M Plus. The main change is the removal of HS/VS/DE signal inversion in the LCDIFv3-DSIM glue logic, otherwise the implementation of this IP in i.MX8M Plus is very much compatible with the i.MX8M Mini/Nano one. Reviewed-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by:
Robert Foss <robert.foss@linaro.org> Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Inki Dae <m.szyprowski@samsung.com>
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Jagan Teki authored
Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC. Add compatible and associated driver_data for it. Reviewed-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by:
Robert Foss <robert.foss@linaro.org> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Tested-by:
Adam Ford <aford173@gmail.com> Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
Samsung MIPI DSIM controller is common DSI IP that can be used in various SoCs like Exynos, i.MX8M Mini/Nano. In order to access this DSI controller between various platform SoCs, the ideal way to incorporate this in the drm stack is via the drm bridge driver. We already have a consolidated code for supporting component and bridge based DRM drivers, so keep the exynos component based code in existing exynos_drm_dsi.c and move generic bridge code as part of samsung-dsim.c Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
IRQ handler for te-gpio seems to be common across DSIM host. However, Exynos is handling this via CRTC drivers but there is no clear evidence on how the same has been handled in i.MX8MM. Keeping the handler as-it-is can be a viable option but adding DSIM bridge core in upcoming patches is not possible to call Exynos CRTC handler as DSIM bridge has to be common across DRM bridge core instead of platform specific DRM drivers like Exynos here. So, this patch handles the handler via platform host helper, so-that handling platform specific hook across Exynos and generic can be reasonable till it makes it generic across all platforms. Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
DSI host registration, attach and detach operations are quite different for the component and bridge-based DRM drivers. Supporting generic bridge driver to use both component and bridge based DRM drivers can be tricky and would require additional host related operation hooks. Add host operation hooks for registering and unregistering Exynos and generic drivers, where Exynos hooks are used in existing Exynos component based DRM drivers and generic hooks are used in i.MX8M bridge based DRM drivers. Add host attach and detach operation hooks for Exynos component DRM drivers and those get invoked while DSI core host attach and detach gets called. Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
Finding the right input bus format throughout the pipeline is hard so add atomic_get_input_bus_fmts callback and initialize with the proper input format from list of supported output formats. This format can be used in pipeline for negotiating bus format between the DSI-end of this bridge and the other component closer to pipeline components. List of Pixel formats are taken from, AN13573 i.MX 8/RT MIPI DSI/CSI-2, Rev. 0, 21 March 2022 3.7.4 Pixel formats Table 14. DSI pixel packing formats Reviewed-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting the i.MX8M Mini/Nano DSI host to add additional Data Enable signal active low (DE_LOW). This makes the valid data transfer on each horizontal line. So, add additional bus flags DE_LOW setting via input_bus_flags for i.MX8M Mini/Nano platforms. Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Suggested-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
Look like an explicit fixing up of mode_flags is required for DSIM IP present in i.MX8M Mini/Nano SoCs. At least the LCDIF + DSIM needs active low sync polarities in order to correlate the correct sync flags of the surrounding components in the chain to make sure the whole pipeline can work properly. On the other hand the i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 says. "13.6.3.5.2 RGB interface Vsync, Hsync, and VDEN are active high signals." i.MX 8M Mini Applications Processor Reference Manual Rev. 3, 11/2020 3.6.3.5.2 RGB interface i.MX 8M Nano Applications Processor Reference Manual Rev. 2, 07/2022 13.6.2.7.2 RGB interface both claim "Vsync, Hsync, and VDEN are active high signals.", the LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. No clear evidence about whether it can be documentation issues or something, so added proper comments on the code. Comments are suggested by Marek Vasut. Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Marek Szyprowski authored
Host transfer() in the DSI master will invoke only when the DSI commands are sent from DSI devices like DSI Panel or DSI bridges and this host the transfer wouldn't invoke for I2C-based-DSI bridge drivers. Handling DSI host initialization in transfer calls misses the controller setup for I2C configured DSI bridges. This patch updates the DSI host initialization by calling host to init from bridge pre_enable as the bridge pre_enable API is invoked by core as it is common across all classes of DSI device drivers. The host init during pre_enable is conditional and not invoked for Exynos as existing downstream drm panels and bridges in Exynos are expecting the host initialization during DSI transfer. Reviewed-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
Samsung MIPI DSIM controller is common DSI IP that can be used in various SoCs like Exynos, i.MX8M Mini/Nano/Plus. Add hw_type enum via platform_data so that accessing the different controller data between various platforms becomes easy and meaningful. Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Suggested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Jagan Teki authored
Look like PLL PMS_P offset value varies between platforms that have Samsung DSIM IP. However, there is no clear evidence for it as both Exynos and i.MX 8M Mini Application Processor Reference Manual is still referring the PMS_P offset as 13. The offset 13 is not working for i.MX8M Mini SoCs but the downstream NXP sec-dsim.c driver is using offset 14 for i.MX8M Mini SoC platforms [1] [2]. PMS_P value set in sec_mipi_dsim_check_pll_out using PLLCTRL_SET_P() with offset 13 and then an additional offset of one bit added in sec_mipi_dsim_config_pll via PLLCTRL_SET_PMS(). Not sure whether it is reference manual documentation or something else but this patch trusts the downstream code and handle PLL_P offset via platform driver data so-that imx8mm driver data shall use pll_p_offset to 14. Similar to Mini the i.MX8M Nano/Plus also has P=14, unlike Exynos. [1] https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/gpu/drm/bridge/sec-dsim.c?h=imx_5.4.47_2.2.0#n210 [2] https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/gpu/drm/bridge/sec-dsim.c?h=imx_5.4.47_2.2.0#n211 Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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