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  1. Feb 17, 2020
  2. Jan 22, 2020
  3. Oct 27, 2019
  4. Oct 08, 2019
  5. May 31, 2019
  6. May 21, 2019
  7. Apr 19, 2019
    • Chris Wilson's avatar
      drm/i915: Expose the busyspin durations for i915_wait_request · 7ce99d24
      Chris Wilson authored
      
      An interesting discussion regarding "hybrid interrupt polling" for NVMe
      came to the conclusion that the ideal busyspin before sleeping was half
      of the expected request latency (and better if it was already halfway
      through that request). This suggested that we too should look again at
      our tradeoff between spinning and waiting. Currently, our spin simply
      tries to hide the cost of enabling the interrupt, which is good to avoid
      penalising nop requests (i.e. test throughput) and not much else.
      Studying real world workloads suggests that a spin of upto 500us can
      dramatically boost performance, but the suggestion is that this is not
      from avoiding interrupt latency per-se, but from secondary effects of
      sleeping such as allowing the CPU reduce cstate and context switch away.
      
      In a truly hybrid interrupt polling scheme, we would aim to sleep until
      just before the request completed and then wake up in advance of the
      interrupt and do a quick poll to handle completion. This is tricky for
      ourselves at the moment as we are not recording request times, and since
      we allow preemption, our requests are not on as a nicely ordered
      timeline as IO. However, the idea is interesting, for it will certainly
      help us decide when busyspinning is worthwhile.
      
      v2: Expose the spin setting via Kconfig options for easier adjustment
      and testing.
      v3: Don't get caught sneaking in a change to the busyspin parameters.
      v4: Explain more about the "hybrid interrupt polling" scheme that we
      want to migrate towards.
      
      Suggested-by: default avatarSagar Kamble <sagar.a.kamble@intel.com>
      References: http://events.linuxfoundation.org/sites/events/files/slides/lemoal-nvme-polling-vault-2017-final_0.pdf
      
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Sagar Kamble <sagar.a.kamble@intel.com>
      Cc: Eero Tamminen <eero.t.tamminen@intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Ben Widawsky <ben@bwidawsk.net>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Michał Winiarski <michal.winiarski@intel.com>
      Reviewed-by: default avatarSagar Kamble <sagar.a.kamble@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190419182625.11186-1-chris@chris-wilson.co.uk
      7ce99d24
  8. Apr 03, 2019
  9. Dec 21, 2018
  10. Jul 17, 2018
    • Takashi Iwai's avatar
      ALSA: hda: Make audio component support more generic · a57942bf
      Takashi Iwai authored
      
      This is the final step for more generic support of DRM audio
      component.  The generic audio component code is now moved to its own
      file, and the symbols are renamed from snd_hac_i915_* to
      snd_hdac_acomp_*, respectively.  The generic code is enabled via the
      new kconfig, CONFIG_SND_HDA_COMPONENT, while CONFIG_SND_HDA_I915 is
      kept as the super-class.
      
      Along with the split, three new callbacks are added to audio_ops:
      pin2port is for providing the conversion between the pin number and
      the widget id, and master_bind/master_unbin are called at binding /
      unbinding the master component, respectively.  All these are optional,
      but used in i915 implementation and also other later implementations.
      
      A note about the new snd_hdac_acomp_init() function: there is a slight
      difference between this and the old snd_hdac_i915_init().  The latter
      (still) synchronizes with the master component binding, i.e. it
      assures that the relevant DRM component gets bound when it returns, or
      gives a negative error.  Meanwhile the new function doesn't
      synchronize but just leaves as is.  It's the responsibility by the
      caller's side to synchronize, or the caller may accept the
      asynchronous binding on the fly.
      
      v1->v2: Fix missing NULL check in master_bind/unbind
      
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      a57942bf
  11. Jul 13, 2018
  12. Sep 19, 2017
  13. Jun 21, 2017
  14. Mar 02, 2017
    • Hans de Goede's avatar
      drm/i915: Listen for PMIC bus access notifications · 264ec1a8
      Hans de Goede authored
      Listen for PMIC bus access notifications and get FORCEWAKE_ALL while
      the bus is accessed to avoid needing to do any forcewakes, which need
      PMIC bus access, while the PMIC bus is busy:
      
      This fixes errors like these showing up in dmesg, usually followed
      by a gfx or system freeze:
      
      [drm:fw_domains_get [i915]] *ERROR* render: timed out waiting for forcewake ack request.
      [drm:fw_domains_get [i915]] *MEDIA* render: timed out waiting for forcewake ack request.
      i2c_designware 808622C1:06: punit semaphore timed out, resetting
      i2c_designware 808622C1:06: PUNIT SEM: 2
      i2c_designware 808622C1:06: couldn't acquire bus ownership
      
      Downside of this approach is that it causes wakeups whenever the PMIC
      bus is accessed. Unfortunately we cannot simply wait for the PMIC bus
      to go idle when we hit a race, as forcewakes may be done from interrupt
      handlers where we cannot sleep to wait for the i2c PMIC bus access to
      finish.
      
      Note that the notifications and thus the wakeups will only happen on
      baytrail / cherrytrail devices using PMICs with a shared i2c bus for
      P-Unit and host PMIC access (i2c busses with a _SEM method in their
      APCI node), e.g. an axp288 PMIC.
      
      I plan to write some patches for drivers accessing the PMIC bus to
      limit their bus accesses to a bare minimum (e.g. cache registers, do not
      update battery level more often then 4 times a minute), to limit the
      amount of wakeups.
      
      BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=155241
      
      
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Tested-by: default avatartagorereddy <tagore.chandan@gmail.com>
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      [danvet: Wiggle in conflicts.]
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
  15. Jan 27, 2017
  16. Dec 16, 2016
  17. Nov 14, 2016
    • Jani Nikula's avatar
      drm/i915: rename preliminary_hw_support to alpha_support · c007fb4a
      Jani Nikula authored
      
      The term "preliminary hardware support" has always caused confusion both
      among users and developers. It has always been about preliminary driver
      support for new hardware, and not so much about preliminary hardware. Of
      course, initially both the software and hardware are in early stages,
      but the distinction becomes more clear when the user picks up production
      hardware and an older kernel to go with it, with just the early support
      we had for the hardware at the time the kernel was released. The user
      has to specifically enable the alpha quality *driver* support for the
      hardware in that specific kernel version.
      
      Rename preliminary_hw_support to alpha_support to emphasize that the
      module parameter, config option, and flag are about software, not about
      hardware. Improve the language in help texts and debug logging as well.
      
      This appears to be a good time to do the change, as there are currently
      no platforms with preliminary^W alpha support.
      
      Cc: Rob Clark <robdclark@gmail.com>
      Cc: Dave Airlie <airlied@gmail.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
      Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1477909108-18696-1-git-send-email-jani.nikula@intel.com
      c007fb4a
  18. Nov 10, 2016
    • Jike Song's avatar
      drm/i915/gvt: add KVMGT support · f30437c5
      Jike Song authored
      
      KVMGT is the MPT implementation based on VFIO/KVM. It provides
      a kvmgt_mpt ops to gvt for vGPU access mediation, e.g. to
      mediate and emulate the MMIO accesses, to inject interrupts
      to vGPU user, to intercept the GTT writing and replace it with
      DMA-able address, to write-protect guest PPGTT table for
      shadowing synchronization, etc. This patch provides the MPT
      implementation for GVT, not yet functional due to theabsence
      of mdev.
      
      It's built as kvmgt.ko, depends on vfio.ko, kvm.ko and mdev.ko,
      and being required by i915.ko. To not introduce hard dependency
      in i915.ko, we used indirect symbol reference. But that means
      users have to include kvmgt.ko into init ramdisk if their
      i915.ko is included.
      
      Signed-off-by: default avatarKevin Tian <kevin.tian@intel.com>
      Signed-off-by: default avatarXiaoguang Chen <xiaoguang.chen@intel.com>
      Signed-off-by: default avatarJike Song <jike.song@intel.com>
      Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
      f30437c5
  19. Oct 25, 2016
    • Akash Goel's avatar
      drm/i915: Add a relay backed debugfs interface for capturing GuC logs · f8240835
      Akash Goel authored
      
      Added a new debugfs interface '/sys/kernel/debug/dri/guc_log' for the
      User to capture GuC firmware logs. Availed relay framework to implement
      the interface, where Driver will have to just use a relay API to store
      snapshots of the GuC log buffer in the buffer managed by relay.
      The snapshot will be taken when GuC firmware sends a log buffer flush
      interrupt and up to four snapshots could be stored in the relay buffer.
      The relay buffer will be operated in a mode where it will overwrite the
      data not yet collected by User.
      Besides mmap method, through which User can directly access the relay
      buffer contents, relay also supports the 'poll' method. Through the 'poll'
      call on log file, User can come to know whenever a new snapshot of the
      log buffer is taken by Driver, so can run in tandem with the Driver and
      capture the logs in a sustained/streaming manner, without any loss of data.
      
      v2: Defer the creation of relay channel & associated debugfs file, as
          debugfs setup is now done at the end of i915 Driver load. (Chris)
      
      v3:
      - Switch to no-overwrite mode for relay.
      - Fix the relay sub buffer switching sequence.
      
      v4:
      - Update i915 Kconfig to select RELAY config. (TvrtKo)
      - Log a message when there is no sub buffer available to capture
        the GuC log buffer. (Tvrtko)
      - Increase the number of relay sub buffers to 8 from 4, to have
        sufficient buffering for boot time logs
      
      v5:
      - Fix the alignment, indentation issues and some minor cleanup. (Tvrtko)
      - Update the comment to elaborate on why a relay channel has to be
        associated with the debugfs file. (Tvrtko)
      
      v6:
      - Move the write to 'is_global' after the NULL check on parent directory
        dentry pointer. (Tvrtko)
      
      v7: Add a BUG_ON to validate relay buffer allocation size. (Chris)
      
      Testcase: igt/tools/intel_guc_logger
      
      Suggested-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarSourab Gupta <sourab.gupta@intel.com>
      Signed-off-by: default avatarAkash Goel <akash.goel@intel.com>
      Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      f8240835
  20. Oct 24, 2016
  21. Oct 19, 2016
  22. Oct 12, 2016
  23. Jun 17, 2016
    • Zhi Wang's avatar
      drm/i915: gvt: Introduce the basic architecture of GVT-g · 0ad35fed
      Zhi Wang authored
      
      This patch introduces the very basic framework of GVT-g device model,
      includes basic prototypes, definitions, initialization.
      
      v12:
      - Call intel_gvt_init() in driver early initialization stage. (Chris)
      
      v8:
      - Remove the GVT idr and mutex in intel_gvt_host. (Joonas)
      
      v7:
      - Refine the URL link in Kconfig. (Joonas)
      - Refine the introduction of GVT-g host support in Kconfig. (Joonas)
      - Remove the macro GVT_ALIGN(), use round_down() instead. (Joonas)
      - Make "struct intel_gvt" a data member in struct drm_i915_private.(Joonas)
      	- Remove {alloc, free}_gvt_device()
      	- Rename intel_gvt_{create, destroy}_gvt_device()
      	- Expost intel_gvt_init_host()
      - Remove the dummy "struct intel_gvt" declaration in intel_gvt.h (Joonas)
      
      v6:
      - Refine introduction in Kconfig. (Chris)
      - The exposed API functions will take struct intel_gvt * instead of
      void *. (Chris/Tvrtko)
      - Remove most memebers of strct intel_gvt_device_info. Will add them
      in the device model patches.(Chris)
      - Remove gvt_info() and gvt_err() in debug.h. (Chris)
      - Move GVT kernel parameter into i915_params. (Chris)
      - Remove include/drm/i915_gvt.h, as GVT-g will be built within i915.
      - Remove the redundant struct i915_gvt *, as the functions in i915
      will directly take struct intel_gvt *.
      - Add more comments for reviewer.
      
      v5:
      Take Tvrtko's comments:
      - Fix the misspelled words in Kconfig
      - Let functions take drm_i915_private * instead of struct drm_device *
      - Remove redundant prints/local varible initialization
      
      v3:
      Take Joonas' comments:
      - Change file name i915_gvt.* to intel_gvt.*
      - Move GVT kernel parameter into intel_gvt.c
      - Remove redundant debug macros
      - Change error handling style
      - Add introductions for some stub functions
      - Introduce drm/i915_gvt.h.
      
      Take Kevin's comments:
      - Move GVT-g host/guest check into intel_vgt_balloon in i915_gem_gtt.c
      
      v2:
      - Introduce i915_gvt.c.
      It's necessary to introduce the stubs between i915 driver and GVT-g host,
      as GVT-g components is configurable in kernel config. When disabled, the
      stubs here do nothing.
      
      Take Joonas' comments:
      - Replace boolean return value with int.
      - Replace customized info/warn/debug macros with DRM macros.
      - Document all non-static functions like i915.
      - Remove empty and unused functions.
      - Replace magic number with marcos.
      - Set GVT-g in kernel config to "n" by default.
      
      Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Cc: Kevin Tian <kevin.tian@intel.com>
      Signed-off-by: default avatarZhi Wang <zhi.a.wang@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1466078825-6662-5-git-send-email-zhi.a.wang@intel.com
      
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      0ad35fed
  24. Mar 03, 2016
  25. Feb 17, 2016
  26. Feb 10, 2016
    • Simona Vetter's avatar
      drm/i915: Stop depending upon CONFIG_AGP_INTEL · 3e99a6b9
      Simona Vetter authored
      
      The AGP_INTEL driver provides an interface for very old userspace to
      control the GART (though the GART itself was only ever emulated on Intel
      systems). The pci bridge discovery code is also used by the i915.ko
      driver to set up the GTT on old systems, but it does not require the
      old userspace interface. When i915.ko selects the old interface, it
      binds another user to the core GTT routines, and in particular creates a
      second reference to the scratch pages allocated. This hinders resource
      leak debugging for when we unload i915.ko as we want to assert that all
      DMA pages have been released, but we appear to leak because of the
      secondary interface which persists after i915.ko unloads.
      
      All i915.ko users do not require the old /dev/agpgart interface so stop
      selecting it and simplify our debugging by dropping the historical
      baggage.
      
      Note that by selecting AGP=n it was already possible to unselect
      AGP_INTEL. But since we've dropped support for any of the AGP stuff
      long ago there's really no point for this any more.
      
      Also note that we still need INTEL_GTT, which is the underlying,
      shared, driver for the graphics GART on gen1-5.
      
      v2: Entirely new commit message (Chris, Ville).
      
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/1453901881-26425-2-git-send-email-daniel.vetter@ffwll.ch
      3e99a6b9
  27. Jan 29, 2016
  28. Jan 25, 2016
  29. Nov 17, 2015
    • Chris Wilson's avatar
      drm/i915: Serialise updates to GGTT with access through GGTT on Braswell · 5bab6f60
      Chris Wilson authored
      When accessing through the GTT from one CPU whilst concurrently updating
      the GGTT PTEs in another thread, the hardware likes to return random
      data. As we have strong serialisation prevent us from modifying the PTE
      of an active GTT mmapping, we have to conclude that it whilst modifying
      other PTE's that error occurs. (I have not looked for any pattern such
      as modifying PTE within the same page or cacheline as active PTE -
      though checking whether revoking neighbouring objects should be enough
      to test that theory.) The corruption also seems restricted to Braswell
      and disappears with maxcpus=0. This patch stops all access through the
      GTT by other CPUs when we update any PTE by stopping the machine around
      the GGTT update.
      
      Note that splitting up the 64 bit write into two 32 bit writes was
      tried and found to fail too.
      
      Testcase: igt/gem_concurrent_blit
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89079
      
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      [danvet: Add note about 2x 32bits failing too.]
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      5bab6f60
  30. Aug 11, 2015
  31. Jun 22, 2015
  32. May 26, 2015
  33. May 21, 2015
  34. Jan 29, 2015
  35. Jul 24, 2014
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