drm/amd/display: Port DCN30 420 logic to DCN32
[Why] 420 modes are limited by FMT buffer width of 4096 which requires multi-pipe support in form of ODM combine. If 420 modes have greater HActive than 4096, the DML logic should accomodate whether it should be rejected, or ODM combine 2:1 or 4:1 is triggered accordingly. [How] FMT Buffer limit of 4096 in DCN32. Force ODM combine depending on HActive and FMT Buffer limit. Reject modes if TMDS 420 and above 4096. Acked-by:Wayne Lin <wayne.lin@amd.com> Signed-off-by:
Chris Park <chris.park@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c 2 additions, 0 deletions...rs/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
- drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c 26 additions, 0 deletions...u/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
- drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h 1 addition, 0 deletions...u/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
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