From 4dc3c0712720ca70b0563b4b64cf14175a96ef8c Mon Sep 17 00:00:00 2001
From: Andrzej Hajda <a.hajda@samsung.com>
Date: Wed, 1 Feb 2017 08:47:43 +0100
Subject: [PATCH] drm/bridge/sii8620: add delay during cbus reset
Without delay CBUS sometimes was not reset properly.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-17-git-send-email-a.hajda@samsung.com
---
drivers/gpu/drm/bridge/sil-sii8620.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c
index a27ce5493323d..1be9c89290c45 100644
--- a/drivers/gpu/drm/bridge/sil-sii8620.c
+++ b/drivers/gpu/drm/bridge/sil-sii8620.c
@@ -892,11 +892,10 @@ static void sii8620_hw_reset(struct sii8620 *ctx)
static void sii8620_cbus_reset(struct sii8620 *ctx)
{
- sii8620_write_seq_static(ctx,
- REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
- | BIT_PWD_SRST_CBUS_RST_SW_EN,
- REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN
- );
+ sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
+ | BIT_PWD_SRST_CBUS_RST_SW_EN);
+ usleep_range(10000, 20000);
+ sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN);
}
static void sii8620_set_auto_zone(struct sii8620 *ctx)
--
GitLab